Field of the Invention
The present invention relates to a frequency synthesizer, in particular a frequency synthesizer for generating mixing oscillator signals for a mixer. The invention also relates to a method of providing a mixing oscillator signal to a mixer, such as an I/Q mixer of a homodyne broadband receiver.
It is known that in digital receiving systems frequency synthesizers are used in the form of mixing oscillators for generating 0xc2x0/90xc2x0 mixing oscillator signals. The 0xc2x0/90xc2x0 mixing oscillator signals are fed to a mixer in order to be mixed there with the high-frequency receive signals of the receiver in order to generate I/Q component signals. In this case, I denotes the signal component which is in phase with the carrier phase, while Q denotes the quadrature component perpendicular to the carrier phase.
In conventional receiving systems, the 0xc2x0/90xc2x0 mixing oscillator signal is generated with the aid of a conventional phase locked loop (PLL), the loop of the phase locked loop essentially having a reference oscillator, a phase detector, a voltage-controlled oscillator and a frequency divider. The phase detector compares the frequency of the reference signal supplied by the reference oscillator with the output frequency of the frequency divider located in the feedback path of the loop, and drives the voltage-controlled oscillator as a function of the result of comparison in order thereby to generate the mixing oscillator signal with the desired frequency.
All known receiver systems operate with a mixing oscillator at the receiving frequency of the receiver. Consequently, it is possible for relatively strong oscillator pulling effects which cause frequency errors in the mixing oscillator signal to occur in the receiver. A further typical problem of known receiver systems relates to the intrinsic mixing of the mixing oscillator, which is caused by crosstalk at the high-frequency input of the corresponding receiver and entails offset DC voltages which can lead to overdriving of the amplifiers used in the receiver. Moreover, two-channel digital I/Q homodyne receiving systems have a relatively poor signal performance. In known solutions without frequency band division, a large tuning or detuning range of the voltage-controlled oscillator cannot be covered simultaneously with good signal performance. In the case of conventional receiving systems, a division of the frequency band is mostly not provided orxe2x80x94if it isxe2x80x94only by using a plurality of oscillators. The exclusively used analog methods for generating the 0xc2x0/90xc2x0 mixing oscillator signals required for I/Q receiving systems do not offer the accuracy and stability of digital methods, and so an increased sensitivity to manufacturing tolerances is to be expected, and this results in turn in increased testing costs.
Published European Patent Application No. EP-A2-0 585 050 discloses a frequency synthesizer with reduced jitter; it includes a first phase locked loop downstream of whose VCO (voltage controlled oscillator) a second phase locked loop is connected in cascaded fashion on the output side. The output signal of the VCO of the second phase locked loop on the one hand forms the output signal of the frequency synthesizer, and on the other hand is fed back to the phase detectors of the first and second phase locked loops via respective dividers. Published, Non-Prosecuted German Patent Application No. DE-A1-43 29 353 discloses a further PLL (phase locked loop) system with cascaded phase locked loops. The output signal is tapped at the output of the VCO of the second phase locked loop.
It is accordingly an object of the invention to provide a frequency synthesizer which overcomes the above-mentioned disadvantages of the heretofore-known frequency synthesizers of this general type and which permits a wide high-frequency tuning range of the voltage-controlled oscillator used therein with the aid of relatively simple circuit devices. In particular, the frequency synthesizer is to be suitable for use as a mixing oscillator in a digital homodyne receiving system, wherein the problems described above and associated with conventional mixing oscillator solutions such as, for example, oscillator pulling or intrinsic mixing, are eliminated.
With the foregoing and other objects in view there is provided, in accordance with the invention, a frequency synthesizer for generating an oscillator signal of a desired frequency, including:
a first phase locked loop for generating a signal with a given frequency from a reference frequency signal;
a second phase locked loop connected in a cascaded manner to the first phase locked loop such that the second phase locked loop receives the given frequency of the signal generated by the first phase locked loop as a reference frequency;
the first phase locked loop having a reference voltage source for generating the reference frequency signal, a first phase detector, a first voltage-controlled oscillator and a first frequency divider;
the first phase detector comparing a frequency of the reference frequency signal with a frequency supplied by the first frequency divider and, as a function thereof, driving the first voltage-controlled oscillator;
the second phase locked loop having a second phase detector, a second voltage-controlled oscillator, a second frequency divider, a fourth frequency divider, and a fifth frequency divider;
the second phase detector comparing a frequency, supplied by the first voltage-controlled oscillator of the first phase locked loop, with a frequency supplied by the second frequency divider and, as a function thereof, driving the second voltage-controlled oscillator;
the second frequency divider of the second phase locked loop and the first frequency divider of the first phase locked loop receiving a signal dependent on an output signal from the second voltage-controlled oscillator;
the second phase detector of the second phase locked loop receiving, via the fourth frequency divider, the frequency supplied by the first voltage-controlled oscillator;
the second frequency divider of the second phase locked loop and the first frequency divider of the first phase locked loop receiving, via the fifth frequency divider, the frequency supplied by the second voltage-controlled oscillator of the second phase locked loop; and
the fifth frequency divider providing, as an output signal, the oscillator signal with the desired frequency.
According to the invention, a first phase locked loop is expanded by a further phase locked loop, which is connected to the known phase locked loop in cascaded fashion such that the second phase locked loop is provided in the feedback loop of the first phase locked loop between the voltage-controlled oscillator thereof and the frequency divider thereof. Thus two mutually nested phase locked loops are provided.
In this way, the voltage-controlled oscillator of the first phase locked loop of the frequency synthesizer can be set to frequencies deviating from the receive frequency of the corresponding receiver, and therefore operates at a frequency offset with reference to the receive frequency, in order to avoid oscillator pulling effects and intrinsic mixing effects. The other oscillators of the frequency synthesizer also do not oscillate at the receive frequency.
The second phase locked loop preferably operates at four times the receive frequency, such that a digital generation of the 0xc2x0/90xc2x0 mixing oscillator signal is rendered possible for digital receiving systems with exceptionally high accuracy (deviation less than 1xc2x0) and independently of manufacturing tolerances, since the 0xc2x0/90xc2x0 mixing oscillator signal can, for example, be generated by a high-precision Johnson counter which, with the exception of the built-in matching, is subject to hardly any further manufacturing tolerances.
The present invention offers the possibility of dividing the receiving range into bands without the attendant need of a plurality of oscillators, such that it is possible to implement a frequency synthesizer with a wide tuning range and with a high quality factor in conjunction with a small variation in the phase noise, which constitutes a decisive operating parameter for the system performance in the case of digital systems.
It is particularly advantageous when the frequency synthesizer is configured to be programmable, something which promotes flexibility and thus customer friendliness. Although the voltage-controlled oscillator of the first phase locked loop does not oscillate at the receive frequency, it is nevertheless the receive frequency, that is to say the oscillator frequency of the mixer of the receiver, that is chosen as reference frequency for the first phase locked loop, and so the phase locked loop can be programmed more simply since it is set precisely to the tuning frequencies. A further great advantage is that the step width of the phase locked loop is retained with reference to the receive frequency.
The above-described advantages of the invention would not be possible in the case of the known frequency synthesizers which are based on the conventional PLL tuning principle described at the beginning, with the precondition that the voltage-controlled oscillator is not to operate at the receive frequency.
According to another feature of the invention, a third frequency divider is provided, and the reference voltage source supplies, via the third frequency divider, the reference frequency signal to the first phase detector of the first phase locked loop.
According to another feature of the invention, the first, second, third, fourth, and fifth frequency dividers are respectively implemented by counters.
According to yet another feature of the invention, the reference voltage source and the third frequency divider are configured such that a reference frequency of the reference voltage source and a divider ratio of the third frequency divider of the first phase locked loop are selected as a function of the desired frequency of the oscillator signal such that the first phase detector of the first phase locked loop receives, as a reference frequency, a desired step width of the oscillator signal.
According to a further feature of the invention, the first, second, third, fourth and fifth frequency dividers have respective divider ratios, and the first, second, third, fourth and fifth frequency dividers and the reference voltage source are configured such that the divider ratios of the first, second, third, fourth and fifth frequency dividers and a reference frequency of the reference voltage source are selected such that the second voltage-controlled oscillator of the second phase locked loop receives a frequency corresponding to four times a value of the desired frequency of the oscillator signal, and such that the fifth frequency divider has a divider ratio of 1:4.
According to another feature of the invention, the fifth frequency divider is implemented as a Johnson counter, and the Johnson counter outputs two oscillator signals mutually offset in phase by 90xc2x0.
According to yet another feature of the invention, the first, second, third, and fourth frequency dividers have respective programmable divider ratios.
According to another feature of the invention, the second phase locked loop has two second voltage-controlled oscillators with respectively different frequency ranges, the second phase locked loop being configured to switch between the two second voltage-controlled oscillators as a function of the desired frequency of the oscillator signal.
According to a further feature of the invention, the second frequency divider and the fourth frequency divider of the second phase locked loop are in each case formed by a combination of a divider with a fixed divider ratio and a divider with a programmable divider ratio.
With the objects of the invention in view there is also provided, a method of providing a mixing oscillator signal to a mixer, the method includes the steps of:
providing a mixing oscillator including a first phase locked loop for generating a signal with a given frequency from a reference frequency signal and including a second phase locked loop connected in a cascaded manner to the first phase locked loop such that the second phase locked loop receives the given frequency of the signal generated by the first phase locked loop as a reference frequency, the first phase locked loop having a reference voltage source for generating the reference frequency signal, a first phase detector, a first voltage-controlled oscillator and a first frequency divider, the first phase detector comparing a frequency of the reference frequency signal with a frequency supplied by the first frequency divider and, as a function thereof, driving the first voltage-controlled oscillator, the second phase locked loop having a second phase detector, a second voltage-controlled oscillator, a second frequency divider, a fourth frequency divider, and a fifth frequency divider, the second phase detector comparing a frequency, supplied by the first voltage-controlled oscillator of the first phase locked loop, with a frequency supplied by the second frequency divider and, as a function thereof, driving the second voltage-controlled oscillator, the second frequency divider of the second phase locked loop and the first frequency divider of the first phase locked loop receiving a signal dependent on an output signal from the second voltage-controlled oscillator, the second phase detector of the second phase locked loop receiving, via the fourth frequency divider, the frequency supplied by the first voltage-controlled oscillator, the second frequency divider of the second phase locked loop and the first frequency divider of the first phase locked loop receiving, via the fifth frequency divider, the frequency supplied by the second voltage-controlled oscillator of the second phase locked loop, and the fifth frequency divider providing, as an output signal, the mixing oscillator signal with a desired frequency; and
providing the mixing oscillator signal with the desired frequency to the mixer.
According to another mode of the invention, the mixing oscillator is used in a homodyne receiver, and the mixer mixes the mixing oscillator signal supplied by the mixing oscillator with a received signal of the homodyne receiver.
According to another mode of the invention, the mixer is an I/Q mixer, the mixing oscillator feeds oscillator signals mutually offset in phase by 90xc2x0 to the I/Q mixer, and the I/Q mixer mixes the mixing oscillator signals with received signals of a digital homodyne receiver, such that the I/Q mixer outputs an I component signal and a Q component signal.
The invention is explained below with reference to the drawings based on preferred exemplary embodiments which relate to the preferred use of the present invention as mixing oscillator, in particular as 0xc2x0/90xc2x0 mixing oscillator, in a homodyne receiver. It is pointed out that the invention is not limited to this field of use, but can in principle be used as desired in any analog or digital system where there is a need for a high-precision frequency synthesizer with a wide tuning range.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a frequency synthesizer, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.